Along with the technological development, people's demand for CPU performance becomes increasingly strong. However, because of increased frequency, power consumption increases more seriously. Therefore, an on-chip multi-core processor architecture is more widely used.
The on-chip multi-core processor architecture refers that multiple processor cores are integrated in one processor chip to achieve a good combination of power consumption and performance.
During a process of researching and developing the present disclosure, the inventors have found that, in the on-chip multi-core processor architecture, processor cores in a processor are not completely independent, and need to share various kinds of processor resources. Therefore, when computing kernels are running programs, performance interference is caused between different programs. For example, when a program with a relatively high priority needs to use a shared resource in the multi-core processor during a running process, another program is also using the shared resource at a same time, which affects performance of the program with a relatively high priority.